Method and device for automatic determination of the required high voltage for programming/erasing an EEPROM

ABSTRACT

A method for automatically determining the high voltage required for programming/erasing an EEPROM wherein the high voltage which is required for erasing or programming each electrically erasable and programmable read-only semiconductor memory is determined individually for each such memory and is stored in the memory itself. This determined high voltage can be called up from the the memory for every further erase or programming operation. Starting from a first value of the high voltage for programming or erasing the memory and a first value of a read voltage for checking the programming or erase operation, the most favorable high voltage is determined by progressively changing either the high voltage or the read voltage.

FIELD OF THE INVENTION

The present invention relates to a method by which, in an electricallyerasable and programmable read-only semiconductor memory, unambiguousprogramming and unambiguous erasure are possible and are largelyindependent of technology-dictated fluctuations in the dependence of thethreshold voltage on the high voltage.

DESCRIPTION OF THE PRIOR ART

In the case of MOS field-effect transistors, doping regions are presentin a substrate on both sides of a gate electrode which is arranged in aninsulated manner over the substrate. Such doping regions are referred toas source and drain regions. By applying a voltage between the gateelectrode and the substrate, in the case of an enhancement-modefield-effect transistor, for example, charge carriers from the substrateare concentrated under the gate electrode. By applying a voltage betweenthe drain region and the source region, further charge carriers from thesource region are injected into this enhanced region. A conductivechannel is thereby formed under the gate electrode between the sourceregion and the drain region wherein the conductivity of the channel canbe controlled by the voltage across the gate electrode.

However, in order to form a conductive channel, a voltage must beapplied between the gate electrode and the substrate, the voltage alsomust have a specific, technology-dependent minimum value, which isreferred to as the threshold voltage.

In principle, electrically erasable read-only memory cells of the EEPROMor flash type have the same structure as MOS field-effect transistors,but they also have a further electrode which is completely surrounded bynon-conductive material--that is to say is completely insulated. Thisadditional electrode is referred to as a floating gate, between theirgate electrode, or control electrode, and the substrate. The thresholdvoltage of the transistor forming a memory cell can be altered byapplying a charge to this floating gate.

The application of charges to the floating gate is referred to asprogramming and the removal of the charges is referred to as erasure ofthe memory cell. Normally, the effect of programming is to shift thethreshold voltage towards lower values wherein the transistor formingthe cell is usually in the on state even without the application of avoltage to the control electrode.

In order to ascertain whether or not a cell is programmed, that iswhether a logic "1" or "0" has been written to it, a voltage readvoltage, is applied to the control electrode. This voltage liesapproximately between the threshold voltages of a programmed cell and ofan erased cell. The logic state of the cell can be ascertained dependingon whether a current flows through the cell.

An EEPROM or flash cell is programmed or erased by a tunnelling currentflowing from the substrate to the floating gate or vice versa. For thispurpose, sufficient energy must be supplied to the charge carriers,which is done by applying a high voltage of approximately 15 V betweenthe control electrode and the substrate and by forming an extremely thininsulating layer between the floating gate and the substrate. As result,a very high field strength occurs there.

To programme an n-channel transistor, positive charge carriers areapplied to the floating gate which means when using a conventionalpositive high voltage, that the latter must be applied to the drainregion while 0 V are applied to the control electrode. Correspondingly,in order to erase the cell, the high voltage is then applied to thecontrol electrode and 0 V is applied to the drain region. This thenremoves the charge carriers again from the floating gate.

A specific minimum high voltage is fundamentally necessary in order toallow the tunnelling current to begin. However, the degree ofprogramming or erasure also depends on the actual level of the highvoltage and on the period of time during which it is applied. Thefundamental profile of the threshold voltage Uth, and hence of thecharge state of the floating gate, as a function of the level of thehigh voltage Vpp is illustrated with solid lines in FIG. 4. It can beseen that as the high voltage increases, the threshold voltage of thecell rises during erasure and falls during programming. In an idealcell, the characteristics run symmetrically with respect to one another,with the result that the threshold voltage at the point of intersectionof the two characteristics is selected as the read voltage UL. At thispoint there is the same margin from the two threshold voltages and thusalso the same signal-to-noise ratio.

For the selection of the level of the high voltage, there is, on the onehand, the desire for a maximum signal-to-noise ratio and for all of thecells to be unambiguously programmed or erased. This means a large highvoltage. On the other hand, the outlay for the high-voltage generator,which is usually formed by a charge pump, is to be kept to a minimum,which means that the high voltage is kept to a minimum. The valuenormally selected for the high voltage is therefore one which justpermits unambiguous programming or erasure.

However, on account of technology-dictated manufacturing tolerances,differences in the profiles of the characteristics, which show thedependence of the threshold voltage Uth on the high voltage Vpp duringprogramming and erasure, can occur from wafer to wafer, from chip tochip on a wafer and from cell to cell on a chip. This can lead todefective memories. FIG. 4 uses dashed lines to illustrate a furtherprogramming characteristic and a further erasure characteristic of thekind that may be produced as a result of such fluctuations. As isevident, a detectable erase operation would not take place in a cellhaving the dashed profile of the characteristics for a given readvoltage UL and a high voltage of the kind determined as favourable fromthe solid characteristics.

The object of the present invention, therefore, is to specify a methodand an apparatus by means of which, in an electrically erasable andprogrammable read-only semiconductor memory, unambiguous programming andunambiguous erasure are possible and are largely independent oftechnology-dictated fluctuations in the dependence of the thresholdvoltage on the high voltage.

An object is achieved by means of methods in accordance with claims 1and 3 as well as an apparatus in accordance with claim 5.

SUMMARY OF THE INVENTION

In accordance with the teachings of the present invention high voltagewhich is most favorable for each memory is progressively determined foreach memory and stored in a non-volatile manner in a read-only memory sothat it can be read out and used by the control unit for all of theprogramming and erase operations.

Provisions may be made for the high voltage to be determined and storedonly when the memory is turned on for the very first time, but it isalso possible to design the control unit in such a way that thisoperation is effected for every turn-on. In certain cases, for examplein a greatly changing environment, it may also be advantageous to carryout a determination of the most favorable high voltage at regularintervals.

Progressive determination in this case means that the high voltage to beapplied to the memory for the purpose of programming or erasure ischanged in steps between a minimum value and a maximum value and theprogramming or erasure result is tested using a fixed, predeterminedread voltage. Progressive determination also means that the programmingor erasure is carried out at a predetermined high voltage, whichlikewise lies between the minimum value and the maximum value,advantageously forming the arithmetic mean of these two values, and istested using different read voltages.

The value taken for the minimum value of the high voltage isadvantageously one which is greater than or equal to that which isphysically necessary to be able to bring about the tunnelling effect. Asa result, time-consuming attempts at programming and erasure whichcannot fundamentally lead to success anyway are not undertaken. Themaximum value in limited by the circuitry of the charge pump forgenerating the high voltage.

In the first case, where the read voltage remains constant, the lattercan have the same value as for every "normal" instance of reading fromthe memory during operation as prescribed. However, it can also beadvantageously set more critically, i.e., closer to the thresholdvoltage set by the programming or erase operation, in order to be ableto detect defective cells more accurately.

In order to determine the required high voltage in a method according tothe present invention, it is necessary to accept a plurality of erase orprogramming operations, wherein it is possible to carry out aprogramming or erase operation prior to each erase or programmingoperation with the maximum high voltage set by the control unit.However, this requires a considerable length of time.

In an alternative embodiment, the method is significantly faster, sincejust one programming or erase operation is carried out, while aplurality of read operations are effected. The latter, however, proceedsmuch more rapidly.

In a development of the present invention, the required high voltagethat is determined can still be increased by a fixed predetermined valuein order to ensure a highly reliable programming and erase operation.

Additional features and advantages of the present invention aredescribed in, and will be apparent from, the Detailed Description of thePreferred Embodiments and from the Drawings.

DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a basic circuit diagram of an apparatus which may practicethe method of the present invention.

FIG. 2 shows a flow diagram of a method according to the presentinvention.

FIG. 3 shows a flow diagram of another method according to the presentinvention.

FIG. 4 shows, in graphical form, characteristics which illustrate thedependence of threshold voltage on high voltage during the erasure andprogramming of an electrically erasable and programmable non-volatilememory cell.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 shows an electrically programmable and erasable read-onlysemiconductor memory SP, which can be addressed by a control unit ST viaan address and data bus ADB. A read voltage UL can be applied to thememory SP by the control unit ST via an additional line. The programmingor erasure of data in the read-only memory SP requires a high voltageVpp, which is generated by an adjustable high-voltage generator HG andis applied to the memory SP. The high-voltage generator HG is driven bya signal S from the control unit ST. The signal S, which can be in bothanalog and digital form, defines the value of the high voltage Vpp.

A specific value of the high voltage Vpp is required for the reliableprogramming or erasure of the memory cells of the memory SP. However,because of technology-dictated fluctuations in the properties of thememory cells, this value can vary from semiconductor chip tosemiconductor chip and thus from memory to memory. Although thehigh-voltage generator HG could be set in such a way that it supplies amaximum high voltage, with the result that all of the memories SP can bereliably programmed and erased, this would lead to an unnecessarily highpower consumption in most of the semiconductor chips on which memoriesSP are implemented, since many of the memories SP could be operated witha lower high voltage Vpp.

Pursuant to a method of the present invention, therefore, the mostfavorable value of the high voltage Vpp, that is to say the value atwhich reliable programming and reliable erasure of the memory SP ispossible, is determined individually for each memory and is stored in anarea A in the memory SP. As a result, it can be called up from the areaA by the control unit ST for each further programming and eraseoperation.

Although the control unit ST can, in principle, be hard-wired in orderto carry out the method of the present invention, it is advantageouslyformed by a microprocessor with an associated program memory.

In accordance with the teachings of the invention, the control unit STsets the adjustable high-voltage generator HG by means of the signal Ssuch that the generator applies a first value of the high voltage Vpp tothe memory SP. In order to program the memory cells of the memory SP,the high voltage Vpp is applied to the drain connections of the memorycells, while the control gate connection receives 0 volts. Conversely inorder to erase the memory cells, the high voltage Vpp is applied to thecontrol gate connection of the memory cells and the drain connectionreceives 0 volts. The first value of the high voltage Vpp will, in thisexample, be the minimum value and then be progressively increased.However, it is equally possible to start at the maximum value of thehigh voltage Vpp and then progressively reduce this value. The highvoltage Vpp is fundamentally applied to the memory cells for a length oftime sufficient to ensure reliable programming or reliable erasure givena suitable magnitude of the high voltage Vpp.

After this first erase or programming operation, the cells are read bythe control unit ST with the read voltage UL which is customary in thecase of normal operation. However, it is also possible, in principle, toselect a more critical read voltage, that is to say a read voltage whichis closer to the threshold voltages of programmed or erased memorycells.

The values read are then compared with the previously written values,that is to say programmed values in the case of a logic "1" or erasedvalues in the case of a logic "0". If the comparison reveals that theread values correspond to the values desired for writing, the firstvalue of the high voltage Vpp is stored in an area of the memory SP sothat it can be called up by the control unit ST for all furtherprogramming and erase operations. Prior to storage, the first value ofthe high voltage Vpp can still be increased by a safety margin.

If the comparison of the read values with the values desired for writingis negative, the value of the high voltage Vpp is increased by aspecific amount, under the control of the control unit ST by means ofthe signal S, to a second value. As a result, the memory cells of thememory SP are programmed or erased.

The read values are subsequently compared again with the values desiredfor writing and, in the event of a positive comparison, the now secondvalue of the high voltage Vpp, possibly increased by a safety margin, isstored in the memory SP. If the comparison once again turns out to benegative, then the high voltage Vpp is again increased by an amount.This method continues until either all of the cells are identified ashaving been erased or programmed or the high voltage Vpp cannot beincreased any further and the memory SP is identified as beingdefective.

In an advantageous development of this method, it is possible, beforeevery increase in the high voltage Vpp, for all of the cells to beprogrammed with the maximum high voltage in the case of the erasure ofthe memory SP and, in the same way, for all of the cells to be erasedwith the maximum high voltage in the case of the programming of thememory SP. This ensures that the same conditions prevail before everyapplication of a new value of the high voltage Vpp.

The sequence of this first method according to the present invention isillustrated as a flow diagram in FIG. 2. Optional method steps, whichrelate to advantageous developments, are framed by dashed lines.

In the same way, FIG. 3 illustrates the flow diagram of another methodof the present invention. In this case, too, a high voltage Vpp isinitially applied to the control gate for the purpose of erasing thememory cells of the memory SP and to the drain connection for thepurpose of programing the memory cells of the memory SP. However, thevalue of the high voltage Vpp is, in this case, fixedly predeterminedand is advantageously calculated as the arithmetic mean of the minimumand maximum values of the high-voltage generator HG that can be set.

After this, a predetermined read voltage UL is set by the control unitST and cells are then read by means of the read voltage. A test issubsequently made to see whether the cells are erased or programmed atthis predetermined read voltage.

This method is based on the insight that the issue of reliableprogramming and erasure of an electrically programmed and erasableread-only memory cell at a given high voltage Vpp, which must, ofcourse, be at least large enough for charges to pass to the floatinggate of the memory cell in the first place, also depends on thesituation of the read voltage UL. This is illustrated in FIG. 4. Anideal profile of the characteristics, which show the dependence of thethreshold voltage Uth of a memory cell during erasure and programming onthe high voltage Vpp, is illustrated with a solid line. In terms ofmagnitude, the two characteristics have the same gradient wherein theideal read voltage UL results at the point of intersection of the twocharacteristics. At a given value VP of the high voltage Vpp, the marginbetween the threshold voltages Uth and the read voltage UL can be seenin FIG. 4.

FIG. 4 uses dashed lines to show a non-ideal position of thecharacteristics which is caused by technology-dictated fluctuations. Ascan be seen, although a programmed cell would be identified at thepreviously ideal read voltage UL, an erased cell would likewise bedetected as being programmed. However, if a memory cell having thecharacteristic illustrated by dashed lines were read with a read voltageof about 0 volts, then it would be reliably identified as being erasedor programmed.

On the basis of this insight, in a further method of the presentinvention, the read voltage UL is increased or reduced by an amount ΔU,depending on whether erasure or programming has been effected. Afterthis, a test is again carried out to see whether all of the cells areerased or programmed. If this is not the case, the predetermined highvoltage Vpp already had the correct value at the first predetermined"normal" read voltage UL and this value is stored in the memory SP,possibly after having been increased by a safety margin.

However, if all of the memory cells have again been identified as beingerased or programmed, the read voltage is once again increased orreduced (depending on whether erasure or programming has been effected)by an amount ΔU and the value of the cells is once again read andcompared with the value desired for writing. If it now emerges that notall of the cells are erased or programmed, the predetermined highvoltage is reduced by the amount ΔU by which the read voltage wasincreased or reduced and this value is stored in the memory SP, possiblyafter having been increased by a safety margin.

The read voltage UL is increased or reduced by an amount ΔU as often asuntil the test reveals that at least one memory cell has not been erasedor programmed. The predetermined high voltage is then reduced by a valuewhich corresponds to the product of the amount ΔU and the number ofcomplete loop iterations.

In the event that in the very first test at least one cell has beenidentified as not being erased or programmed, the read voltage isreduced or increased by an amount ΔU, depending on whether erasure orprogramming has been effected. The read voltage UL is therefore changedin the other direction. This is followed, possibly over a plurality ofloop iterations, by testing and progressive reduction or increasing ofthe read voltage UL by the amount ΔU until all of the cells areidentified as being erased or programmed. The predetermined high voltageis then increased by a value which corresponds to the product of theamount ΔU and the number of loop iterations+1. This value is thenstored, possibly after having been increased by a safety margin in thearea A of the memory SP.

In the methods of the present invention, different values of the highvoltage can be stored in the memory SP for erasure and programming.However, it is also possible to select just one value namely the largerof the two values. The methods of the invention enable the high voltageVpp, which is required for erasing or programming each electricallyerasable and programmable read-only semiconductor memory SP to bedetermined individually for each electrically erasable and programmableread-only semiconductor memory SP and to be stored in the memory SPitself, in an area A provided there. This determined high voltage can becalled up from the area A for every further erase or programmingoperation. The methods according to the invention proceed automatically,at least during the first start-up of the memory SP.

What is claimed is:
 1. Method for determining the high voltage (Vpp)which is required for programming or for erasure in a programmable anderasable read-only semiconductor memory (SP), having the followingsteps:a) application of a high voltage (Vpp) or--in the case of therepeated implementation of this step--the increased high voltage(Vpp+ΔV• (number of loop iterations)) to the control gate (SG) of amemory cell for the purpose of erasing the memory cell or to the drainconnection of the memory cell for the purpose of programming the memorycell, b) reading of the cells with a predetermined read voltage (UL), c)if all of the cells are erased or programmed: non-volatile storage ofthe high voltage (Vpp+ΔV• (number of loop iterations)), d) if at leastone cell is not erased or programmed: increasing of the high voltage bya specific amount (ΔV) and beginning at step a).
 2. Method according toclaim 1, characterized in that the memory is erased or programmed with amaximum high voltage before every instance of programming or erasing thememory cells with a set high voltage (Vpp+ΔU• (number of loopiterations)).
 3. Method for determining the high voltage (Vpp) which isrequired for programming or for erasure in a programmable and erasableread-only semiconductor memory (SP), having the following steps:a)application of a predetermined high voltage (Vpp) to the control gate ofa memory cell for the purpose of erasing the memory cell or to the drainconnection of the memory cell for the purpose of programming the memorycell, b) setting of a predetermined read voltage (UL), c) reading of thecells at the predetermined read voltage (UL), d) if all of the cells areerased or programmed:d1) increasing or reduction of the read voltage bya predetermined amount (ΔU), d2) reading of the cells at the increasedor reduced read voltage, d3) if at least one cell is not erased orprogrammed: reduction of the predetermined high voltage (Vpp) by theamount ΔU• (number of loop iterations) and storage of the reduced highvoltage (Vpp-ΔU• (number of loop iterations)), d4) if all of the cellsare erased or programmed: continuation with step d1), e) if at least onecell is not erased or programmed:e1) reduction or increasing of the readvoltage by a predetermined amount (ΔU), e2) reading of the cells at thereduced or increased read voltage, e3) if all of the cells are erased orprogrammed: increasing of the predetermined high voltage (Vpp) by theamount ΔU• (number of loop iterations+1) and storage of the increasedhigh voltage (Vpp+ΔU• (number of loop iterations+1)), e4) if at leastone cell is not erased or programmed: continuation with step e1). 4.Method according to claim 1, 2 or 3, characterized in that the highvoltage is increased by a safety margin before it is stored. 5.Apparatus for automatically determining the high voltage(s) (Vpp) whichis/are required for programming and/or erasure in a programmable anderasable read-only semiconductor memory (SP), which apparatus isoperated using a method in accordance with one of claims 1 to 4,having acontrol unit (ST), which is connected to the memory (SP) via an addressand data bus (ADB) and also to a line for applying a read voltage (UL)to the memory (SP), having an adjustable high-voltage generator (HG), towhich a control signal (S) can be applied by the control unit (ST), itbeing possible for an adjustable high voltage (Vpp) to be applied to thememory (SP) by the high-voltage generator (HG), andthe memory (SP)having an area (A) to and from which the determined high voltage(s)(Vpp) required can be written and read.